مشاهده مشخصات مقاله
An Efficient Hardware Implementation for H.264 Binary Arithmetic Encoder
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نویسنده (ها) |
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Farzad Zargari
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Ehsan Azimi
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مربوط به کنفرانس |
چهاردهمین کنفرانس بینالمللی سالانه انجمن کامپیوتر ایران |
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چکیده |
Binary Arithmetic Coding (BAC) is among the
techniques used in H.264 video coding standard to
improve the coding efficiency. BAC includes an
iterative process of renormalization with up to seven
iterations for coding each symbol. Since BAC is also a
computational intensive unit in H.264 encoder, various
hardware realizations have been proposed for it in the
literature. In this paper, we propose a hardware
implementation for BAC, which uses lookup table to
avoid the iterative coding process and achieves coding
rate of one symbol per clock at 260 MHz clock rate.
Post synthesize simulation results indicate that the
proposed architecture is a resource and speed efficient
hardware for H.264 binary arithmetic encoder. |
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قیمت |
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برای اعضای سایت : ۱٠٠,٠٠٠ ریال
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برای دانشجویان عضو انجمن : ۲٠,٠٠٠ ریال
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برای اعضای عادی انجمن : ۴٠,٠٠٠ ریال
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