انجمن کامپیوتر ایران

Cache memories are used in flash-based SSDs to improve the performance of disks. Conventional DRAM caches suffer from high energy consumption due to pre-charge and refresh operations and leakage current. In addition, DRAM cells are volatile memories and lose data in power-off. Moreover, according to ITRS, DRAM cells are not scalable below 22nm technology size. Emerging non-volatile memories, e.g. phase-change memory (PCM) offers a near-DRAM performance. In addition, PCM gives non-volatility, negligible leakage power and higher degree of scalability. Two main challenges of exploiting PCM as an alternative to DRAM cells are their limited write endurance and high write latency. This paper proposes a method on how to efficiently manage PCM as a SSD cache. This technique is based on swapping blocks inside a cache set, called Swapped-LRU. This technique reduces the gap between the hottest and coldest line in a set by 7x. In addition, we propose an early write-back technique to improve the cache miss latency.