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HDL Based Simulation Framework for a DPA Secured Embedded System

Danial Kamran, Ali Marjovi, Ali Fanian, Mehran Safayani

نویسنده (ها)

سمپوزیوم سیستم‌ها و فن‌آوری‌های بی‌درنگ و نهفته RTEST 2015

مربوط به کنفرانس

Side Channel Analysis (SCA) are still harmfulthreats against security of embedded systems. Due to the fact thatevery kind of SCA attack or countermeasure against it needs to beimplemented before evaluation, a huge amount of time and costof this process is paid for providing high resolution measurementtools, calibrating them and also implementation of proposeddesign on ASIC or target platform. In this paper, we haveintroduced a novel simulation platform for evaluation of powerbased SCA attacks and countermeasures. We have used Synopsyspower analysis tools in order to simulate a processor and implementa successful Differential Power Analysis (DPA) attack on it.Then we focused on the simulation of a common countermeasureagainst DPA attacks called Random Delay Insertion (RDI). Wesimulated a resistant processor that uses this policy. In the nextstep we showed how the proposed framework can help to extractpower characteristics of the simulated processor and implementpower analysis based reverse engineering on it. We used thisapproach in order to detect DPA related assembly instructionsbeing executed on the processor and performed a DPA attack onthe RDI secured processor. Experiments were carried out on aPico-blaze simulated processor.

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