فا   |   En
Login
مشاهده‌ مشخصات مقاله

Multi Parametric Optimized Architectural Synthesis of an Application Specific Processor

Authors
  • Summit Sehgal
  • Reza Sedaghat
  • Anirban Sengupta
  • Zhipeng Zeng
Conference چهاردهمین کنفرانس بین‌المللی سالانه انجمن کامپیوتر ایران
Abstract Recent advancements in the field of multimedia and wireless communications have led to a wide array of application and services requiring high data processing rate at minimal power consumption. This new generation of data hungry portable devices requires power efficient hardware solutions where the operational specifications are as important as objective functionality. Conventional processing solutions like MIPS fall short on real time computational intensive operations due to large software overhead. This class of applications demands dedicated hardware units like Application Specific Processors (ASP) working as hardware accelerators for intensive data processing operations. In this paper we describe a novel Register Transfer Level (RTL) synthesis process of a power and throughput optimized ASP for a sample application. The ASP implemented on an FPGA, can serve as a hardware accelerator for system on chip (SOC) or as a standalone Application Specific Integrated Circuit (ASIC) at silicon level.
قیمت
  • برای اعضای سایت : 100,000 Rial
  • برای دانشجویان عضو انجمن : 20,000 Rial
  • برای اعضای عادی انجمن : 40,000 Rial

خرید مقاله