فا   |   En
Login
مشاهده‌ مشخصات مقاله

A memory-centric approach to enable timing-predictability within embedded many-core accelerators

Authors
  • Paolo Burgio
  • Andrea Marongiu
  • Paolo Valente
  • Marko Bertogna
Conference سمپوزیوم سیستم‌ها و فن‌آوری‌های بی‌درنگ و نهفته RTEST 2015
Abstract There is an increasing interest among real-time systemsarchitects for multi- and many-core accelerated platforms. Themain obstacle towards the adoption of such devices withinindustrial settings is related to the difficulties in tightly estimatingthe multiple interferences that may arise among the parallelcomponents of the system. This in particular concerns concurrentaccesses to shared memory and communication resources. Existingworst-case execution time analyses are extremely pessimistic,especially when adopted for systems composed of hundreds-to-thousandsof cores. This significantly limits the potential forthe adoption of these platforms in real-time systems. In thispaper, we study how the predictable execution model (PREM), amemory-aware approach to enable timing-predictability in real-timesystems, can be successfully adopted on multi- and many-coreheterogeneous platforms. Using a state-of-the-art multi-coreplatform as a testbed, we validate that it is possible to obtain anorder-of-magnitude improvement in the WCET bounds of parallelapplications, if data movements are adequately orchestrated inaccordance with PREM. We identify which system parametersmostly affect the tremendous performance opportunities offeredby this approach, both on average and in the worst case, movingthe first step towards predictable many-core systems.
قیمت
  • برای اعضای سایت : 100,000 Rial
  • برای دانشجویان عضو انجمن : 20,000 Rial
  • برای اعضای عادی انجمن : 40,000 Rial

خرید مقاله